Processor autonomy and its effect on parallel program execution

Author

Hawver, Dennis M. ; Adams, George B., III

Author_Institution

Annapolis Micro Syst., MD, USA

fYear

1996

fDate

27-31 Oct 1996

Firstpage

144

Lastpage

153

Abstract

Processor autonomy is the potential of a processing element in a parallel computer to act differently from other processors during execution. A new parallel architecture taxonomy is presented that includes the necessary and sufficient conditions to achieve processor autonomy. Processor autonomy is possible when multiple data address, data value, instruction address, or instruction value streams are available. Parallel program execution can be significantly aided by processor autonomy, allowing various mappings and dynamic reassignment of PEs to streams. Parallel program performance is evaluated for several sorting algorithms using one form of data address autonomy, indirect addressing, and one form of instruction value autonomy, branch selection

Keywords

parallel architectures; parallel machines; parallel programming; software performance evaluation; sorting; branch selection; dynamic reassignment; indirect addressing; mappings; multiple data address streams; multiple data value streams; multiple instruction address streams; multiple instruction value streams; parallel architecture taxonomy; parallel computer; parallel program execution; parallel program performance evaluation; processing element; processor autonomy; sorting algorithms; Assembly; Broadcasting; Computer aided instruction; Computer architecture; Concurrent computing; Costs; Data engineering; Parallel architectures; Sorting; Taxonomy;

fLanguage

English

Publisher

ieee

Conference_Titel

Frontiers of Massively Parallel Computing, 1996. Proceedings Frontiers '96., Sixth Symposium on the

Conference_Location

Annapolis, MD

ISSN

1088-4955

Print_ISBN

0-8186-7551-9

Type

conf

DOI

10.1109/FMPC.1996.558071

Filename

558071