DocumentCode
2249141
Title
Dual Mode Architecture for Deblocking Filtering in H.264/AVC Video Coding
Author
Bojnordi, Mahdi Nazm ; Fatemi, Omid ; Hashemi, Mahmoud Reza
Author_Institution
Nano-Electron. Center of Excellence, Tehran Univ.
fYear
2006
fDate
4-7 Dec. 2006
Firstpage
1745
Lastpage
1748
Abstract
Block based video codecs suffer from visible blocking artifacts in the reconstructed video frames. Eliminating the blocking artifacts improves output video quality, significantly. New video coding standards employ adaptive filtering tools to solve this problem. Because of huge computational load of these tools they became the implementation bottlenecks in real-time applications. This paper proposes a high-performance deblocking architecture suited for both dedicated hardware and platform-based implementation of H.264/AVC video codecs. The new architecture supports two operational modes for high-performance and low-power filtering. Working at high-performance mode, the proposed architecture offers 44% to 76% performance improvement compared to the existing state-of-the-art architectures. Half of this performance is achieved while working at low-power mode. In the low-power mode, however, up to 41% of power is saved. Operating at 100MHz, the new architecture supports processing resolution of 2208 times 2000 (4:2:0) at 30 fps
Keywords
adaptive filters; video codecs; video coding; adaptive filtering; blocking artifacts; deblocking filtering; dual mode architecture; reconstructed video frames; video coding; video quality; Automatic voltage control; Computer architecture; Decoding; Energy consumption; Filtering; Filters; Hardware; MPEG 4 Standard; Video codecs; Video coding; deblocking filter;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location
Singapore
Print_ISBN
1-4244-0387-1
Type
conf
DOI
10.1109/APCCAS.2006.342155
Filename
4145749
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