Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator

Author

Zhou, Tong ; Zhou, Zhibo ; Yu, Mingyan ; Ye, Yizheng

Author_Institution

Microelectron. Center, Harbin Inst. of Technol.

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

1955

Lastpage

1958

Abstract

This paper presents a low power high entropy design of a truly random number generator based on a simple chaotic map of the Bernoulli shift, which is extended to keep robustness in practical implementation. The map is accurately realized by switched-current techniques, and a pipelined architecture post-processed by simple XOR circuits is used to improve the throughput and the entropy. The whole design is implemented in UMC 0.18 mum CMOS mixed signal process, and the statistical properties are investigated by simulations. The power consumption is 3.024 mW and the truly random output bit rate is 20 Mbit/s

Keywords

chaos; entropy; logic design; low-power electronics; random number generation; 0.18 micron; 20 Mbits/s; 3.024 mW; Bernoulli shift; CMOS mixed signal process; XOR circuits; chaotic map; low power high entropy design; pipelined architecture; power consumption; random number generator; statistical properties; switched-current techniques; CMOS process; Chaos; Circuit simulation; Entropy; Random number generation; Robustness; Signal design; Signal processing; Switching circuits; Throughput; chaos; entropy; random number generator;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342244

Filename

4145801