A multi-phase multi-frequency clock generator using superharmonic injection locked multipath ring oscillators as frequency dividers

A phase-locked loop providing multiphase clocks at 12-GHz and its subdivisions is presented. A quadrature VCO with low supply sensitivity is used. Frequency division is achieved using superharmonic injection-locked multipath ring oscillators to extend the maximum division frequency of latch-based dividers without using peaking inductors. A low mismatch charge pump reduces the reference spur level to a worst case of -74 dBc. The phase locked loop is fabricated in 65-nm CMOS. It operates in a frequency band between 7.92-12.14 GHz. The measured phase noise, random jitter, and power consumption at 12.08 GHz output frequency are -127.5 dBc/Hz at 10 MHz offset, 251 fs-rms, and 46.6 mW, respectively.