Efficient job-release plan development for semiconductor assembly and testing in GA

Taiwan´s semiconductor integrated circuit (IC) industry plays an important role in the world and has maintained a major market share, especially, in the business of IC´s packaging and testing. In the past, many studies have discussed job-release models for upstream IC manufacturing, but few emphasize on the IC turnkey factory, which including IC assembly and testing operations. In this paper, a job-release strategy for an IC turnkey factory with known assembly cycle time will be proposed. Concerning objectives under limited-capacity resources are (1) increasing the overall equipment efficiency (OEE) of IC test equipments, (2) reducing the fabrication cycle time, and (3) increasing the on-time delivery (OTD) rate. A genetic algorithm (GA) is applied to obtain an efficient job-release plan based on the data of an IC turnkey factory in Taiwan.