DocumentCode
2254214
Title
Panel 6.8: The challenges of heterogeneous multicore debug
Author
Martin, Grant ; Mayer, Albrecht
Author_Institution
Tensilica, Santa Clara, California, U.S.A.
fYear
2010
fDate
8-12 March 2010
Firstpage
789
Lastpage
789
Abstract
We have seen the practical use of multi-processors in complex SoCs and systems grow in the past several years, and the discussion range from architectures through to programming models. One of the issues that poses several challenges to design and verification teams is that of multi-core debug, especially in heterogeneous systems where the processors may be from different vendors, and even when from the same vendor, may be very application-specific. In this panel, designers and researchers who have practical experience with heterogeneous multiprocessor systems, both commercial and research, will draw on those experiences.
Keywords
Debugging; Engineering management; Hardware; Multicore processing; Multiprocessing systems; Pins; Process design; Signal processing; Silicon; Standardization; SoC; debugging; manycore; multicore;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4244-7054-9
Type
conf
DOI
10.1109/DATE.2010.5456944
Filename
5456944
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