DocumentCode
2255921
Title
Low-complexity reconfigurable complex constant multiplication for FFTs
Author
Qureshi, Fahad ; Gustafsson, Oscar
Author_Institution
Dept. of Electr. Eng., Linkoping Univ., Linkoping, Sweden
fYear
2009
fDate
24-27 May 2009
Firstpage
1137
Lastpage
1140
Abstract
In this work we consider structures for simultaneous multiplication by a small set of two pairwise coefficients where the coefficients are the real and imaginary part of a limited number of points uniformly spread on the unit circle. Hence, each such multiplier forms half of a complex multiplier suitable for twiddle factor multiplication in FFT architectures. Based on trigonometric identities we propose a multiplier for a unit circle resolution of 32 points. Also, we revisit an earlier proposed multiplier for 16 points and show that the complexity can be reduced by using minimum adder constant multipliers compared with the earlier proposed CSD-based multipliers.
Keywords
computational complexity; fast Fourier transforms; signal processing; FFT architecture; fast Fourier transform; low-complexity reconfigurable complex constant multiplication; minimum adder constant multiplier; twiddle factor multiplication; Computer architecture; Delay; Discrete Fourier transforms; Fast Fourier transforms; Flexible printed circuits; Frequency division multiplexing; Hardware; OFDM; Pipelines; Spectroscopy;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3827-3
Electronic_ISBN
978-1-4244-3828-0
Type
conf
DOI
10.1109/ISCAS.2009.5117961
Filename
5117961
Link To Document