Use of nonlinear Chua´s circuit for on-line offset calibration of ADC

The offset of an ADC is one of the main limitations for interleaved architectures. The method proposed here enables a precise measurement of the offset while the ADC operates and introduces a minimum disturb to the output result. The method exploits a random modulation by +1 or -1 of the input signal. The modulating signal is the wide-band output of a Chua circuit passed through a comparator. The resulting spread spectrum can be easily distinguished by the dc offset and reconstructed in the digital domain with a synchronous demodulation. The use of a digital accumulator extracts the offset. The accumulation time can be many clock periods (like 10⁶) thus permitting an excellent accuracy in the offset measurement. Simulations of the proposed approach at the behavioral level confirm the effectiveness of the method. It is shown that the offset of a 12-bit ADC can be measured with a 0.1 LSB accuracy.