DocumentCode
2258609
Title
A novel local bottom-gate carbon nanotube field effect transistor on SOI
Author
Zhang, Min ; Chan, Philip C H ; Liang, Qi ; Tang, Zikang
Author_Institution
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
fYear
2003
fDate
29 Sept.-2 Oct. 2003
Firstpage
63
Lastpage
64
Abstract
In this paper, a new local bottom-gate configuration of CNFET is proposed. By patterning the doped top silicon film of a SOI wafer to form gates of FETs, individually addressable devices on the same substrate are realised. The thin and good quality thermal oxide is used as gate dielectric, so the supply voltage and power consumption can be reduced.
Keywords
carbon nanotubes; insulated gate field effect transistors; nanotube devices; power consumption; silicon-on-insulator; C-Si; FET; SOI wafer; Si; doped top silicon film; gate dielectric; good quality thermal oxide; novel local bottom-gate carbon nanotube field effect transistor; power consumption; Insulated gate FETs; Power demand; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2003. IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-7815-6
Type
conf
DOI
10.1109/SOI.2003.1242899
Filename
1242899
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