DocumentCode
2259599
Title
A physical model of a CMOS varactor with high capacitance tuning range and its application to simulate a voltage controlled oscillator
Author
Maget, Judith ; Kraus, Rainer ; Tiebout, Marc
Author_Institution
Dept. of Electr. Eng., Univ. of Bundeswehr, Munich, Germany
fYear
2001
fDate
2001
Firstpage
609
Lastpage
612
Abstract
A physical model of a CMOS varactor with high capacitance tuning range in multi-finger layout is presented. The model describes the voltage dependent capacitances and resistances and the parasitics due to connecting wires. Simulations of frequency tuning of a LC-oscillator employing the varactor are verified against measurements
Keywords
MOS capacitors; circuit tuning; semiconductor device models; varactors; voltage-controlled oscillators; CMOS varactor; LC oscillator; capacitance tuning range; frequency tuning; multi-finger layout; physical model; voltage controlled oscillator; CMOS technology; Circuit optimization; Inductors; Parasitic capacitance; Radiofrequency integrated circuits; Semiconductor device modeling; Tuning; Varactors; Voltage; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2001 International
Conference_Location
Washington, DC
Print_ISBN
0-7803-7432-0
Type
conf
DOI
10.1109/ISDRS.2001.984593
Filename
984593
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