DocumentCode
2260192
Title
A proposed AVS decoder configuration in the reconfigurable video coding framework
Author
Ding, Dandan ; Qi, Honggang ; Yu, Lu ; Huang, Tiejun ; Gao, Wen
Author_Institution
Inst. of Inf. & Commun. Eng., Zhejiang Univ., Hangzhou, China
fYear
2009
fDate
24-27 May 2009
Firstpage
1934
Lastpage
1934
Abstract
This demonstration shows an AVS intra decoder configuration in the RVC framework. It explains how to use the dataflow mechanism offered by the RVC framework to support AVS decoder configuration. It also shows the flexibility and convenience to reconfigure decoders in the RVC framework. In this work, the AVS VTL is established containing FUs from AVS. The proposed AVS decoder configuration is implemented by connecting some FUs from AVS VTL and reusing some FUs from MPEG VTL. The demonstration shows that the decoder can decode AVS conformance bitstreams correctly in RVC simulator.
Keywords
video coding; AVS decoder configuration; RVC simulator; dataflow mechanism; functional units; reconfigurable video coding framework; video tool library; Circuit simulation; Circuits and systems; Computer architecture; Computer science; Decoding; Information science; Joining processes; Open source software; Software standards; Video coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3827-3
Electronic_ISBN
978-1-4244-3828-0
Type
conf
DOI
10.1109/ISCAS.2009.5118165
Filename
5118165
Link To Document