Memory-mapped I/O over dual port BRAM on FPGA

Nowadays, Direct Memory Access (DMA) is one of the most used mechanisms for data transfer between a processor and its peripherals. Another possibility is to map peripherals directly in the memory space, which has the disadvantage of requiring dual port memories when the device handles large quantities of data. It typically is the case of video and network applications. In this work we propose the use of dual port BRAM often available in modern FPGAs to implement a core using Memory mapped I/O (MMIO). As a case study, we present the development of an AVR microcontroller core with the Media Access Controller (MAC) Ethernet built in. It is capable of running the uIP TCP/IP stack, with a Web Server as example application. Additionally, we discuss the advantages of moving the program code to an external memory that use the Common Flash Interface (CFI) standard. This design was simulated with Free Software tools and it was verified in hardware using a Xilinx Virtex 4 FPGA.