Efficient Implementation of Symbol Timing Synchronization in OFDM System

This paper presents an OFDM baseband system including symbol timing synchronization and integer frequency estimate based on FPGA. An estimator for OFDM symbol timing and integer frequency offsets is proposed based on conjugate multiplication and autocorrelation properties of PN (pseudo noise) codes. In our system, for the estimation of both symbol timing and integer frequency offsets, a newly designed time domain preamble sequence which has the same length with the number of IFFT points and consists of PN codes which alternate with zeros , is utilized. All the sub- modules of synchronization circuit are described in Verilog HDL. The result of computer simulation shows that the Receiver of OFDM system applying the algorithm can generate a right symbol timing point in the guard interval and according to the integer frequency estimating, the system can adjust the data sequence automatically.