DocumentCode
2263078
Title
Optimizing CMOS amplifier design directly in SPICE without the need for additional mathematical models
Author
Yoo, Euisoo ; Roberts, Gordon W.
Author_Institution
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
fYear
2009
fDate
24-27 May 2009
Firstpage
2497
Lastpage
2500
Abstract
This paper presents a method that optimizes the performance of CMOS amplifiers with respect to gain, bandwidth, noise, distortion and power. The method is performed directly in SPICE without the aid of mathematical models or external software routines. The method works in all SPICE programs from Cadence to the student version of PSPICE. The technique is based on tuning the voltage of specific nodes of the amplifier using a servo-loop biasing technique in conjunction with a replica amplifier circuit to span the entire performance space with a resolution of choice. Both single-stage and multi-stage amplifiers are considered in this work.
Keywords
CMOS integrated circuits; SPICE; amplifiers; CMOS amplifier design optimisation; Cadence; PSPICE; mathematical model; multistage amplifier; replica amplifier circuit; servo-loop biasing technique; single-stage amplifier; voltage tuning; Bandwidth; Circuit optimization; Design optimization; Mathematical model; Optimization methods; Performance gain; Power amplifiers; SPICE; Software performance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3827-3
Electronic_ISBN
978-1-4244-3828-0
Type
conf
DOI
10.1109/ISCAS.2009.5118308
Filename
5118308
Link To Document