DocumentCode
2263576
Title
Emulation-based fault injection in circuits with embedded memories
Author
García-Valderas, Mario ; Portela-García, Marta ; López-Ongil, Celia ; Entrena, Luis
Author_Institution
Dept. of Electron. Technol., Carlos III Univ. of Madrid
fYear
0
fDate
0-0 0
Abstract
FPGA emulation has proven to be a performance effective method to analyse the behaviour of digital circuits in the presence of soft errors due to SEU effects. In particular, the recently developed autonomous emulation techniques allow the classification of thousands and even millions of faults per second. In this paper, an approach to extend the autonomous emulation techniques to circuits with embedded memories is presented. The LEON2 processor benchmark is used to demonstrate as an application for the proposed techniques
Keywords
digital storage; fault simulation; field programmable gate arrays; microcomputers; microprocessor chips; FPGA emulation; LEON2 processor benchmark; SEU effect; digital circuit behaviour; embedded memory circuit; emulation-based fault injection; soft errors; Circuit faults; Controllability; Costs; Emulation; Field programmable gate arrays; Flip-flops; Instruments; Microelectronics; Observability; Performance analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International
Conference_Location
Lake Como
Print_ISBN
0-7695-2620-9
Type
conf
DOI
10.1109/IOLTS.2006.29
Filename
1655542
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