Automatic model refinement of GmC integrators for high-level simulation of continuous-time Sigma-Delta modulators

Author

Vasilevski, Michel ; Aboushady, Hassan ; Louerat, Marie-Minerve

Author_Institution

Lab. LIP6/SOC, Univ. of Paris VI, Pierre et Marie Curie, France

fYear

2009

fDate

24-27 May 2009

Firstpage

2769

Lastpage

2772

Abstract

A SigmaDelta GmC integrator refinement flow is presented. The classically simplified GmC integrator small-signal model was upgraded to be extremely accurate by considering the complete transistor small-signal model. A circuit-level knowledge-based tool was used to execute the designer defined sizing procedure and to extract small signal parameters. By associating the symbolic transfer function to small-signal parameters, the flow, entirely implemented with C++, is able to compute poles and zeros to permit precise behavioral simulations. A 2^nd order SigmaDelta modulator was chosen to visualize performance degradations while the specifications were not achievable.

Keywords

integrating circuits; sigma-delta modulation; transfer functions; GmC integrators; automatic model refinement; circuit-level knowledge-based tool; continuous-time sigma-delta modulators; symbolic transfer function; transistor small-signal model; Circuit simulation; Computational modeling; Degradation; Delta-sigma modulation; Frequency; Poles and zeros; Sampling methods; Signal design; Transfer functions; Visualization;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5118376

Filename

5118376