Universal packet time slot-a new paradigm of designing an ATM switch

The objective of this paper is to provide a different angle of a view to relieve the stringent requirements of an electronic device in designing very high speed packet switching. This facet of the view is based on two facts; the fact that, there is a significant difference between the transmission speed offered by the lightwave technology and the processing speed of an electronic switching device, and the fact that, there are two different views of utilizing the bandwidth of a transmission line, that is, the FDM (frequency division multiplexing) technique and the TDM (time division multiplexing) technique. In the current design paradigms, internal ATM switching fabrics have being sped up to resolve output contention, regardless of their architectures. Because the speed of the electronic devices is limited by how fast an electrical signal can transmit, the speed-up will eventually either limit the number of inputs or outputs of a switching fabric or limit the speed of the transmission link. Bit-sliced techniques, that achieve a high degree of parallelism, though have been widely used to reduce the tight requirements of the electronic devices, will ultimately be limited by the small size of the ATM cells. Hence, a universal packet time slot (UPTS) is proposed to relieve the stringent requirements of an electronic device. The concept of a UPTS is discussed and the hardware complexity of implementing a UPTS switch is also presented