DocumentCode
2269118
Title
200 MHz 0.8 μm CMOS gradient vector processor for real-time execution
Author
Margala, Martin ; Durdle, Nelson G.
Author_Institution
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
Volume
1
fYear
1998
fDate
24-28 May 1998
Firstpage
261
Abstract
This paper describes a gradient vector processor which forms an important part of a shading processor being developed for a high resolution high performance real-time general purpose volume imaging system. The proposed architecture overcomes current image resolution and frame-rate limitations through the use of custom high-speed processors. The gradient vector processor evaluates three arithmetic operations: a square and add operation, square-root, and three division operations. Fully pipelined operation produces a vector every 5 ns or with a 200 MHz frequency at Vdd=3 V and with an accuracy of ±0.78%. The algorithms and implementation in silicon are described in detail
Keywords
CMOS digital integrated circuits; digital arithmetic; digital signal processing chips; image resolution; pipeline processing; real-time systems; vector processor systems; 0.8 micron; 200 MHz; 3 V; 5 ns; CMOS; Si; accuracy; algorithms; architecture; arithmetic operations; custom high-speed processors; division operations; frame-rate limitation; frequency; general purpose volume imaging system; gradient vector processor; high performance system; high resolution system; image resolution; pipelined operation; real-time execution; real-time system; shading processor; square and add operation; square-root; Arithmetic; CMOS process; Computer architecture; Computer graphics; Geophysics computing; High-resolution imaging; Image reconstruction; Image resolution; Real time systems; Vector processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1998. IEEE Canadian Conference on
Conference_Location
Waterloo, Ont.
ISSN
0840-7789
Print_ISBN
0-7803-4314-X
Type
conf
DOI
10.1109/CCECE.1998.682732
Filename
682732
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