DocumentCode
2279950
Title
Improving signal integrity by optimal design of power/ground plane stack-up structure
Author
Jin, Chiayu ; Chou, Chia-Hsing ; Li, Dian-rung ; Chuang, Tsung-ying
Author_Institution
Adv. Semicond. Eng. Inc., Kaohsiung
fYear
2006
fDate
6-8 Dec. 2006
Firstpage
853
Lastpage
859
Abstract
This paper focuses on the signal integrity due to non-ideal return path on multi-layer packages, such as normal BGA or flip-chip BGA. The main effect of non-ideal return path of a signal is that several resonant modes will be derived at specific frequencies, and these resonant modes will degrade the signal integrity depending on the location of non-ideal return path. The resonant characteristic is inherent in electronic packages that use solid power and ground planes because a pair of power/ground planes behaves like a resonant cavity with induced displacement currents from signal transitions or switching noise. In order to solve the problem mentioned above, stack-up of power/ground planes must be arranged carefully. Besides, adding proper amount of power/ground vias on proper locations can help to eliminate power/ground plane effect on signal trace. This paper discuss how the non-ideal return path affects signal integrity of signals in both strip-line and microstrip line, and try to find out a optimal stack-up design of a multi-layer package.
Keywords
ball grid arrays; flip-chip devices; microstrip lines; printed circuits; electronic packages; flip-chip ball grid arrays; ground plane stack-up structure; microstrip line; multi-layer packages; non-ideal return path; resonant cavity; signal integrity; Analytical models; Degradation; Electromagnetic measurements; Frequency; Insertion loss; Packaging; Pins; Resonance; Scattering parameters; Signal design;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2006. EPTC '06. 8th
Conference_Location
Singapore
Print_ISBN
1-4244-0664-1
Electronic_ISBN
1-4244-0665-X
Type
conf
DOI
10.1109/EPTC.2006.342824
Filename
4147353
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