• DocumentCode
    2282613
  • Title

    Methods for modeling resource contention on simultaneous multithreading processors

  • Author

    Moseley, Tipp ; Kihm, Joshua L. ; Connors, Daniel A. ; Grunwald, Dirk

  • Author_Institution
    Dept. of Comput. Sci., Colorado Univ., Boulder, CO, USA
  • fYear
    2005
  • fDate
    2-5 Oct. 2005
  • Firstpage
    373
  • Lastpage
    380
  • Abstract
    Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and caches. SMT designs increase utilization and generally improve overall throughput, but the amount of improvement is highly dependent on competition for shared resources between the scheduled threads. This variability has implications that relate to operating system scheduling, simulation techniques, and fairness. Although these techniques recognize the implications of thread interaction, they do little to profile and predict this interaction. The modeling approach presented in this paper uses data collected from performance counters on two different hardware implementations of Pentium-4 hyper-threading processors to demonstrate the effects of thread interaction. Techniques are described for fitting linear regression models and recursive partitioning to use the counters to make online predictions of performance (expressed as instructions per cycle); these predictions can be used by the operating system to guide scheduling decisions. A detailed analysis of the effectiveness of each of these techniques is presented.
  • Keywords
    integrated circuit design; integrated circuit modelling; logic partitioning; microprocessor chips; multi-threading; recursive functions; regression analysis; Pentium-4 hyper-threading processors; linear regression model; online performance prediction; operating system scheduling; recursive partitioning; resource contention modeling; simultaneous multithreading processor; thread interaction; Bandwidth; Counting circuits; Hardware; Linear regression; Multithreading; Operating systems; Processor scheduling; Surface-mount technology; Throughput; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
  • Print_ISBN
    0-7695-2451-6
  • Type

    conf

  • DOI
    10.1109/ICCD.2005.74
  • Filename
    1524178