A digital read/write channel with EEPR4 detection

Author

Welland, D.R. ; Phillip, S.M. ; Leung, Ka.Y. ; Tuttle, G.T. ; Dupuie, S.T. ; Holberg, D.R. ; Jack, R.V. ; Sooch, N.S. ; Anderson, K.D. ; Armstrong, A.J. ; Behrens, R.T. ; Bliss, W.G. ; Dudley, T.O. ; Foland, W.R. ; Glover, N. ; King, L.D.

Author_Institution

Crystal Semicond. Corp., Austin, TX, USA

fYear

1994

fDate

16-18 Feb. 1994

Firstpage

276

Lastpage

277

Abstract

This device increases the inter-symbol interference (ISI) manageable in a magnetic-media read channel. It re-configures analog and digital circuits by registers to optimize read and write channels. The 51 mm/sup 2/ device is fabricated in a standard 0.8 /spl mu/m single-poly double-metal CMOS process, and contains 128 k transistors. No external components are required for operation other than standard decoupling capacitors. Most of the circuits are active while reading data from the media (data mode), and techniques such as the use of differential analog structures, dedicated supply routes and substrate connections, and shields are employed to control digital interference.<>

Keywords

CMOS integrated circuits; intersymbol interference; magnetic disc storage; mixed analogue-digital integrated circuits; 0.8 micron; EEPR4 detection; decoupling capacitors; dedicated supply routes; differential analog structures; digital interference; digital read/write channel; inter-symbol interference; magnetic-media read channel; single-poly double-metal CMOS process; substrate connections; Circuits; Digital control; Filters; Frequency; MOS capacitors; Registers; Servomechanisms; Timing; Transconductance; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-1844-7

Type

conf

DOI

10.1109/ISSCC.1994.344643

Filename

344643