DocumentCode
2285002
Title
A 3.0 W 75SPECint92 85SPECfp92 superscalar RISC microprocessor
Author
Pham, Duc-Son ; Alexander, M.J. ; Arizpe, A. ; Burgess, B. ; Dietz, C. ; Eisen, L. ; El-Kareh, R. ; Eno, J. ; Gary, S. ; Gerosa, G. ; Goins, B. ; Golab, J. ; Golla, Robert ; Harris, Roy ; Ho, Byron ; Ho, Y.-W. ; Hoover, K. ; Hunter, Charles ; Ippolito, P.
Author_Institution
IBM Corp., Austin, TX, USA
fYear
1994
fDate
16-18 Feb. 1994
Firstpage
212
Lastpage
213
Abstract
This superscalar microprocessor is a 32b implementation of the PowerPC Architecture. With an estimated performance/power ratio of 25SPECint92/W at 80 MHz, this RISC style chip offers workstation-level performance packed into a low-power consumption, low-cost design ideal for notebooks and desktop computers.<>
Keywords
CMOS integrated circuits; microprocessor chips; reduced instruction set computing; 3.0 W; 32 bit; 75SPECint92; 80 MHz; 85SPECfp92; CMOS; PowerPC Architecture; desktop computers; low-cost design; notebooks; performance/ power ratio; superscalar RISC microprocessor; workstation-level performance; Buffer storage; Central Processing Unit; Clocks; Electronics packaging; Logic; Microprocessors; Phase locked loops; Prefetching; Reduced instruction set computing; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-1844-7
Type
conf
DOI
10.1109/ISSCC.1994.344665
Filename
344665
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