DocumentCode
2285659
Title
Effect of intrinsic-parameter fluctuations on 16-nm-gate CMOS and current mirror circuit
Author
Yiu, Chun-Yen ; Li, Yiming ; Han, Ming-Hung ; Lee, Kuo-Fu ; Khaing, Thet-Thet ; Cheng, Hui-Wen ; Su, Zhong-Cheng
Author_Institution
Dept. of Electr. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2010
fDate
17-20 Aug. 2010
Firstpage
798
Lastpage
801
Abstract
This work, for the first time, estimates the influence of intrinsic-parameter fluctuations consisting of the metal-gate work-function fluctuation (WKF), the oxide-thickness fluctuation (OTF), the process-variation effect (PVE), and the random-dopant fluctuation (RDF) on 16-nm-gate complementary metal oxide semiconductor (CMOS) devices and circuit. Experimentally calibrated 3D device / circuit coupled simulation allows us to evaluate the effect of aforementioned fluctuations on CMOS devices´ characteristics. Their impacts on the driving current of current mirror circuits are then explored. Variability suppression on RDF according to asymmetric doping profile engineering is thus advanced to mitigate the fluctuation. The normalized driving current fluctuations of current mirror circuit are reduced from 8.43% to 4.66% for the current mirror circuit made by NMOS and from 8.51% to 5.54% for the current mirror circuit made by PMOS, respectively. Furthermore, bulk FinFETs with an aspect ratio of 2 are implemented for suppressing these fluctuations.
Keywords
CMOS integrated circuits; integrated circuit modelling; CMOS; current mirror circuit; intrinsic parameter fluctuations; metal-gate work-function fluctuation; process variation effect; random-dopant fluctuation;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology (IEEE-NANO), 2010 10th IEEE Conference on
Conference_Location
Seoul
ISSN
1944-9399
Print_ISBN
978-1-4244-7033-4
Electronic_ISBN
1944-9399
Type
conf
DOI
10.1109/NANO.2010.5697825
Filename
5697825
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