• DocumentCode
    2289838
  • Title

    Non-linear partitioning for decimal logarithm approximation

  • Author

    Vudadha, Chetan ; Veeramachaneni, Sreehari ; Srinivas, M.B.

  • Author_Institution
    Dept. of Electr. Eng., Birla Inst. of Technol. & Sci. (BITS), Hyderabad, India
  • fYear
    2011
  • fDate
    6-7 Oct. 2011
  • Firstpage
    102
  • Lastpage
    105
  • Abstract
    This work presents a systematic approach for the implementation of decimal logarithmic converter. In this approach the decimal logarithm is divided into different regions and linear approximation is applied to each of them. The novelty of this algorithm lies in the selection of regions for linear approximation. The regions are selected in such a way that only a minimum number of coefficients is to be stored. All the other coefficients for linear approximation can be generated from the stored coefficients. A 10-region linear approximation method is explained in detail. Simulation results show that this method achieves a maximum positive and negative error of 0.0044 and 0.0015 respectively. It can also be applied to a 20-region approximation, which has a maximum positive and negative error of 0.000811 and 0.000948 respectively.
  • Keywords
    approximation theory; 10-region linear approximation method; 20-region approximation; decimal logarithm approximation; decimal logarithmic converter; nonlinear partitioning; Algorithm design and analysis; Approximation algorithms; Equations; Error correction; Hardware; Linear approximation; Decimal; linear approximation; logarithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics and Electronics (PrimeAsia), 2011 Asia Pacific Conference on Postgraduate Research in
  • Conference_Location
    Macau
  • ISSN
    2159-2144
  • Print_ISBN
    978-1-4577-1608-9
  • Type

    conf

  • DOI
    10.1109/PrimeAsia.2011.6075081
  • Filename
    6075081