DocumentCode
2291080
Title
Positive feedback CMOS charge-pump circuits for PLL applications
Author
Hernández, Esdras Juárez ; Sánchez, Alejandro Díaz
Author_Institution
Nat. Inst. for Astrophysics, Opt. & Electron., INAOE, Puebla, Mexico
Volume
2
fYear
2001
fDate
2001
Firstpage
836
Abstract
Two new charge-pump topologies for RF applications are presented. Their switching speed is increased by using positive feedback, while the power consumption is reduced with current reuse paths. Simulation results for a 0.35 μm AMS CMOS technology parameters, shows the feasibility of both structures for low-voltage high-frequency applications
Keywords
CMOS analogue integrated circuits; circuit feedback; phase locked loops; switching circuits; 0.35 micron; AMS CMOS technology; CMOS charge pump circuits; LV HF applications; PLL applications; RF applications; current reuse paths; high frequency applications; low-voltage applications; positive feedback; power consumption reduction; switching speed; Charge pumps; Circuit topology; Energy consumption; Feedback circuits; Optical feedback; Phase frequency detector; Phase locked loops; Phase noise; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location
Dayton, OH
Print_ISBN
0-7803-7150-X
Type
conf
DOI
10.1109/MWSCAS.2001.986317
Filename
986317
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