DocumentCode
2297014
Title
The disposable Dot Field Effect Transistor: Process flow and overlay requirements
Author
Moers, J. ; Gerharz, J. ; Trellenkamp, St. ; Hart, A. V D ; Mussler, G. ; Grüitzmacher, D.
Author_Institution
Inst. of Bio- & Nanosystems, Forschungszentrum Julich, Julich
fYear
2008
fDate
12-16 Oct. 2008
Firstpage
203
Lastpage
206
Abstract
The progress in the field of MOSFET devices was facilitated by the downscaling of their dimensions. To maintain device performance, the lateral layout was improved continually, but in recent years new device architectures as Ultra Thin Body and Multi Gate devices were discussed. Furthermore new materials were introduced as high-K gate dielectrics and metal gates. Today the advantages of strained silicon as material for the channel are investigated. The strained material offers the advantage of a higher carrier mobility, which leads to a better Ion/Ioff-ratio. In this work a device process using locally strained silicon by means of template-assisted self-assembly is proposed.
Keywords
MOSFET; dielectric materials; MOSFET devices; carrier mobility; device architectures; disposable dot field effect transistor; high-K gate dielectrics; locally strained silicon; metal gates; multigate devices; overlay requirements; process flow; template-assisted self-assembly; ultra thin body devices; Capacitive sensors; Dielectric materials; Etching; FETs; Germanium silicon alloys; High K dielectric materials; Lattices; MOSFET circuits; Silicon germanium; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Devices and Microsystems, 2008. ASDAM 2008. International Conference on
Conference_Location
Smolenice
Print_ISBN
978-1-4244-2325-5
Electronic_ISBN
978-1-4244-2326-2
Type
conf
DOI
10.1109/ASDAM.2008.4743317
Filename
4743317
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