Enhanced Identification of Strong Robustly Testable Paths

Strong robustly sensitizable paths play an essential role in determining circuit timing characteristics as well as defining delay fault diagnosis resolution. A novel technique is presented that increases the number of strong robustly sensitizable path delay faults (PDFs) through validation. Experimental results show that the proposed strong robust validation technique significantly improves the number of strong robustly sensitizable PDFs therefore increases diagnosis resolution and improves the ability to correctly determine circuit timing characteristics