Packaging challenges in SS-1 supercomputer storage card design

Design of high performance Main Memory Storage requires the integration of a large number of SRAM devices in a compact physical volume to maximize the performance that can be lost due to electrical time of flight between the CPU, Control Logic, and Memory Storage Elements. Further considerations must be given for maintaining signal integrity and the reduction of electrical power supply noise induced by fast switching BiCMOS SRAM devices to utilize the inherent performance of the SRAM device. This paper describes the methods used to solve the integration and performance issues in the SS-1 Main Memory Storage Card design and will discuss the architecture, electrical design, cooling, and unique packaging utilized to provide a dense high performance memory solution for the SS-1 Supercomputer