Fast timing simulation for submicron hot-carrier degradation

Author

Sun, Weishi ; Rosenbaum, Elyse ; Kang, Sung-Mo

Author_Institution

Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

fYear

1995

fDate

4-6 April 1995

Firstpage

65

Lastpage

71

Abstract

This paper presents a new fast timing reliability simulator ILLIADS-R which can simulate hot-carrier degradation in very large integrated circuits. A region wise-quadratic model is used to fit submicron transistor I-V curves. Using quasi-static models, ILLIADS-R accurately simulates hot-carrier damage in both pMOS and nMOS transistors of large scale CMOS integrated circuits.

Keywords

CMOS integrated circuits; VLSI; circuit analysis computing; hot carriers; integrated circuit modelling; integrated circuit reliability; timing; ILLIADS-R; NMOS transistors; PMOS transistors; fast timing simulation; large scale CMOS integrated circuits; quasi-static models; region wise-quadratic model; reliability simulator; submicron hot-carrier degradation; submicron transistor I-V curves; very large integrated circuits; CMOS integrated circuits; Circuit simulation; Degradation; Hot carriers; Integrated circuit modeling; Integrated circuit reliability; Large scale integration; MOSFETs; Semiconductor device modeling; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 1995. 33rd Annual Proceedings., IEEE International

Conference_Location

Las Vegas, NV

Print_ISBN

0-7803-2031-X

Type

conf

DOI

10.1109/RELPHY.1995.513656

Filename

513656