DocumentCode
2305488
Title
Hot-carrier-induced circuit degradation in actual DRAM
Author
Huh, Yoonjong ; Yang, Dooyoung ; Shin, Hyungsoon ; Sung, Yungkwon
Author_Institution
GoldStar Electron R&D Lab., Seoul, South Korea
fYear
1995
fDate
4-6 April 1995
Firstpage
72
Lastpage
75
Abstract
The hot-carrier effects on DRAM have been evaluated thoroughly by investigating the performance degradation of each constituent circuit as component transistor aging in a 64 Mb DRAM. The mechanism of how the overall circuit performance is affected by unit transistor aging and which transistors cause most critical circuit performance failures is discussed. It was found that hot-carrier-induced transistor aging in the circuit block did not directly affect the speed degradation, but instead, seriously reduced the design margin of the analog circuit. The circuit performance degradation caused by hot-carrier stress depended more on the circuit structure including output loading rather than the voltage level. In addition, on-chip hot-carrier stress/test patterns were also used to investigate the influence of different output loads of inverter on the dynamic hot-carrier degradation. It was found that the inverter with heavy output load showed less degradation in comparison to the inverter with small load.
Keywords
DRAM chips; VLSI; hot carriers; integrated circuit reliability; 64 Mbit; DRAM; hot-carrier effects; hot-carrier stress/test patterns; hot-carrier-induced circuit degradation; performance degradation; unit transistor aging; Aging; Analog circuits; Circuit optimization; Degradation; Hot carrier effects; Hot carriers; Inverters; Random access memory; Stress; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 1995. 33rd Annual Proceedings., IEEE International
Conference_Location
Las Vegas, NV
Print_ISBN
0-7803-2031-X
Type
conf
DOI
10.1109/RELPHY.1995.513657
Filename
513657
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