DocumentCode
2305654
Title
Design and implementation of an ABR server in a shared-bus ATM switch
Author
Zervanos, E. ; Stassinopoulos, G.
Author_Institution
Div. of Comput. Sci., Nat. Tech. Univ. of Athens, Greece
fYear
2000
fDate
2000
Firstpage
366
Lastpage
371
Abstract
This paper concerns the design and development of an available bit rate (ABR) server as part of an asynchronous transfer mode (ATM) switch. The overall implementation is based on a shared medium switching architecture, a time division multiplexed (TDM) bus, providing both modularity and high reliability. The paper focuses on hardware architecture of the entire system and presents its basic software architecture
Keywords
asynchronous transfer mode; buffer storage; network servers; shared memory systems; telecommunication congestion control; ABR server; TDM bus; asynchronous transfer mode switch; available bit rate server; hardware architecture; share buffer memory; shared medium switching architecture; shared-bus ATM switch; software architecture; time division multiplexed bus; Asynchronous transfer mode; Bit rate; Communication switching; Computer architecture; Costs; Quality of service; Switches; Telecommunication switching; Traffic control; Virtual colonoscopy;
fLanguage
English
Publisher
ieee
Conference_Titel
Computers and Communications, 2000. Proceedings. ISCC 2000. Fifth IEEE Symposium on
Conference_Location
Antibes-Juan les Pins
Print_ISBN
0-7695-0722-0
Type
conf
DOI
10.1109/ISCC.2000.860665
Filename
860665
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