Properties of high voltage stress generated traps in thin silicon oxides

It has been shown that trap generation inside thin oxides during high voltage stressing can be coupled to time-dependent-dielectric-breakdown distributions through the statistics linking wearout to breakdown. Since the traps play a crucial role in the wearout/breakdown process, it is important to understand the properties of these traps. Oxides with thicknesses between 2.5 nm and 22 nm have been studied with emphasis on oxides in the 6 nm to 13 nm thickness range. The cross-section of the traps responsible for the scattering of electrons in the tunneling barrier, the spatial and energy distribution of the traps, and the charging/discharging properties of the traps have been measured. It will be shown that all of the measured properties of the traps can be adequately described by electron flow into and out of traps that were generated by the application of high fields to oxides, without resorting to describing the traps or trap generation in terms of the flow of holes or in terms of impact ionization processes.