Analysis of leakage currents in poly-silicon thin film transistors

In this paper we show good agreement between numerical simulations and experimental data of the bias, temperature dependence and statistical behaviour of leakage currents in NMOS polycrystalline silicon (poly-Si) thin film transistors (TFTs). At high drain bias TFT leakage is caused by minority carriers generated by a high field tunneling mechanism near the TFT drain. We show that the temperature dependence of this leakage current is not, as has been previously assumed, determined by the temperature dependence of the tunneling mechanism, but rather by the potential barrier to carrier injection at the source.<>