• DocumentCode
    2314273
  • Title

    JANUS, an on-line multiplier/divider for manipulating large numbers

  • Author

    Guyot, Alain ; Herreros, Yvan ; Muller, Jean-Michel

  • Author_Institution
    Lab. TIM3-IMAG, Grenoble, France
  • fYear
    1989
  • fDate
    6-8 Sep 1989
  • Firstpage
    106
  • Lastpage
    111
  • Abstract
    The authors deal with the detailed VLSI implementation of a fast bit-serial operator designed to perform very high precision (600 decimal digits) additions, multiplications, and divisions, and some of the applications of the circuit are discussed. Online arithmetic needs carry-free redundant number systems. Frequently, the radix chosen is different from 2, since a carry-free addition algorithm can be used in radix r≠2. In radix 2, carry-free addition is possible, but with two inconveniences: the algorithm seems more complicated, and the delay is larger. The authors show that the first inconvenience vanishes if good binary representation of the digits in radix-2 signed digit notation is chosen
  • Keywords
    VLSI; digital arithmetic; JANUS; VLSI; additions; carry-free redundant number systems; divisions; fast bit-serial operator; manipulating large numbers; multiplications; online multiple/divider; Adders; Arithmetic; Circuits; Concurrent computing; Logic functions; Pipeline processing; Propagation delay; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Arithmetic, 1989., Proceedings of 9th Symposium on
  • Conference_Location
    Santa Monica, CA
  • Print_ISBN
    0-8186-8963-3
  • Type

    conf

  • DOI
    10.1109/ARITH.1989.72815
  • Filename
    72815