DocumentCode
2314702
Title
System-level Performance Verification of Multicore Systems-on-Chip
Author
Holt, Jim ; Dastidar, Jaideep ; Lindberg, David ; Pape, John ; Yang, Peng
Author_Institution
Networking & Multimedia Group, Freescale Semicond., Inc., Austin, TX, USA
fYear
2009
fDate
7-9 Dec. 2009
Firstpage
83
Lastpage
87
Abstract
MCSoC are comprised of a rich set of processor cores, specialized hardware accelerators, and I/O interfaces. Focusing only on functional verification is risky because the motivation for building such systems in the first place is to achieve high levels of system throughput: a functionally correct MCSoC that does not exhibit sufficient performance will fail in the market. Furthermore, focusing performance verification on individual system components (e.g., measuring processor core performance or hardware accelerator performance in isolation) is insufficient due to (1) the degree of resource contention that occurs in the MCSoC, and (2) the degree of configuration flexibility that is typically afforded by an MCSoC. These factors motivate system-level performance verification of MCSoC. This paper presents an important industrial case study of MCSoC performance verification, highlighting the methodology used, the lessons learned, and recommendations for improvement.
Keywords
multiprocessing systems; program verification; system-on-chip; I/O interfaces; MCSoC; functional verification; hardware accelerators; multicore systems-on-chip; processor cores; resource contention; system level performance verification; Bandwidth; Delay; Emulation; Hardware design languages; Microprocessors; Multicore processing; Multimedia systems; Semiconductor device testing; System testing; Throughput; multicore; performance; validation;
fLanguage
English
Publisher
ieee
Conference_Titel
Microprocessor Test and Verification (MTV), 2009 10th International Workshop on
Conference_Location
Austin, TX
ISSN
1550-4093
Print_ISBN
978-1-4244-6479-1
Electronic_ISBN
1550-4093
Type
conf
DOI
10.1109/MTV.2009.10
Filename
5460807
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