A new staggered virtual ground array architecture implemented in a 4Mb CMOS EPROM

Author

All, S. ; Nguyen, D. ; Sani, B. ; Shubat, A. ; Hu, C. ; Me ; Kazarounian ; Eltan, B.

Author_Institution

WaferScale Integration, Inc.

fYear

1989

fDate

25-27 May 1989

Firstpage

Lastpage

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1989. Digest of Technical Papers., 1989 Symposium on

Conference_Location

Kyoto, Japan

Type

DOI

10.1109/VLSIC.1989.1037477

Filename

1037477

Link To Document