Architectural design of fuzzy inference processor using triangular-shaped membership function

The hardware design of a fuzzy processor is always intended to improve its inference performance for real time applications or to reduce the overall cost. The applications of fuzzy logic in various fields have always suffered from a major problem of low speed of operation. The calculation of matching degree always needs very high latency and limits the overall inference performance. In this paper, a novel architecture for calculating the matching between two triangular-shaped membership functions has been proposed. The VHDL implementation of the proposed architecture has been performed. The proposed architecture is more efficient in area and the speed of operation in comparison to a more complex architecture used for the trapezoid-shaped membership function. The proposed architecture has been implemented in a Xilinx Field Programmable Gate Array (FPGA). Further, from the proposed architecture, matching of other type of membership functions can also be obtained easily.