Progress on design and demonstration of the 4MB chalcogenide-based random access memory

Author

Ramaswamy, Shankarnarayana ; Li, Bin ; Bumgarner, Adam ; Rodgers, John ; Burcin, Laura ; Hunt, Kenneth K. ; Maimon, Jonathan D.

Author_Institution

BAE Syst., Manassas, VA, USA

fYear

2004

fDate

15-17 Nov. 2004

Firstpage

137

Lastpage

142

Abstract

The first generation of C-RAM memory is designed to greatly exceed (in density, write speed, endurance) the existing non-volatile memory solutions for space and to close the gap that exists between system requirements and availability. Based on the success of the 64 kb C-RAM program, we are designing a 4 Mb C-RAM product implemented in 0.25 μm radiation-hardened CMOS. We present a description of the architecture and design of the prototype 4 Mb chalcogenide non-volatile memory and provide schematic based simulation results showing memory operation.

Keywords

CMOS integrated circuits; amorphous semiconductors; memory architecture; radiation hardening (electronics); random-access storage; 0.25 micron; 4 MB; C-RAM memory; chalcogenide-based random access memory; memory operation; nonvolatile memory; phase change; radiation-hardened CMOS; system availability; system requirements; CMOS technology; Electrodes; Laboratories; Nonvolatile memory; Phase change materials; Phase change memory; Radiation hardening; Random access memory; Solid state circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Non-Volatile Memory Technology Symposium, 2004

Print_ISBN

0-7803-8726-0

Type

conf

DOI

10.1109/NVMT.2004.1380830

Filename

1380830