A vision sensor with background subtraction processor using mixed analog-digital architecture

Moving object extraction from a video sequence plays an essential role for various machine vision applications such as video surveillance, traffic monitoring, and human motion analysis. There are two widely used methods for moving object extraction: the frame differencing method and the background subtraction method. Although the background subtraction method usually generates superior results to the frame differencing method, it is difficult to implement this method in a VLSI because of the processing time, power consumption and hardware resources required for background image generation. We have designed a column-parallel background subtraction VLSI for 160times120-pixel image using 0.18 mum CMOS process. Its operation was verified by post-layout HSPICE simulation including the RC parasitic devices. It was estimated that the maximum frame rate was 2000 frames/sec where the power consumption of the moving objects extraction circuit was 11 mW.