DocumentCode

2325098

Title

Utilization of Rams With a Defective Row or Column In Micros and Minis

Author

Pohm, A.V.

Author_Institution

Iowa State University

fYear

1979

fDate

4-7 Sep 1979

Firstpage

425

Lastpage

427

Keywords

Clocks; Content addressable storage; Costs; Delay; Integrated circuit yield; PROM; Pins; Random access memory; Read-write memory; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Compcon Fall 79. Proceedings

Type

conf

DOI

10.1109/CMPCON.1979.729147

Filename

729147