DocumentCode
2340861
Title
Efficient dedicated multiplication blocks for 2’s complement radix-16 and radix-256 array multipliers
Author
Pieper, Leandro Zafalon ; da Costa, Eduardo A. C. ; de Almeida, S.J.M. ; Bampi, Sergio ; Monteiro, Joao C.
Author_Institution
Univ. Catolica de Pelotas, Pelotas
fYear
2008
fDate
7-9 Nov. 2008
Firstpage
1
Lastpage
6
Abstract
In this paper, we introduce new dedicated blocks for radix-16 and radix-256 multiplication. These blocks are basic components of the structure of the 2psilas complement radix-2m array multiplier proposed previously in the literature. In the original array multiplier, the blocks that perform the radix-16 multiplication were automatically synthesized from a truth table. The dedicated radix-16 multiplication blocks we propose are themselves composed of a structure of less complex multiplication blocks and resort to efficient Carry Save adders (CSA). This new scheme can be naturally extended for radix-256 multiplication. We present results of area, delay and power consumption for 16, 32 and 64 bit array multipliers using the new dedicated modules. The results show that by using the new dedicated modules, the array multipliers are more efficient in terms of delay and power consumption when compared both against the original array structure and the Modified Booth multiplier.
Keywords
adders; digital arithmetic; multiplying circuits; Carry Save adders; multiplication blocks; radix-16 multiplication; radix-256 array multipliers; twos complement radix-16; word length 16 bit; word length 32 bit; word length 64 bit; Circuits and systems; Decision support systems; Fiber reinforced plastics;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Circuits and Systems, 2008. SCS 2008. 2nd International Conference on
Conference_Location
Monastir
Print_ISBN
978-1-4244-2627-0
Electronic_ISBN
978-1-4244-2628-7
Type
conf
DOI
10.1109/ICSCS.2008.4746936
Filename
4746936
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