DocumentCode
2343138
Title
An approach to improve the resolution of defect-based diagnosis
Author
Yamazaki, Iwao ; Yamanaka, Hiroki ; Ikeda, Toshio ; Takakura, Masahiro ; Sato, Yasuo
Author_Institution
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
fYear
2001
fDate
2001
Firstpage
123
Lastpage
128
Abstract
Presents a practical approach to improve the resolution of defect-based diagnosis. To diagnose the faulty chips, various techniques are needed as well as modeling the defects precisely. In this paper, some techniques using the layout information, a multi-test diagnosis method, and a testing method for the delay fault are discussed, and some experimental results of actual chips are shown. The resolution of the diagnosing test patterns is also discussed
Keywords
VLSI; automatic testing; delays; fault diagnosis; integrated circuit testing; logic testing; deep sub-micron process; defect-based diagnosis; delay fault; faulty chips; layout information; multi-test diagnosis method; resolution; testing method; Bridge circuits; Delay; Fault detection; Fault diagnosis; Fault location; Probes; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2001. Proceedings. 10th Asian
Conference_Location
Kyoto
ISSN
1081-7735
Print_ISBN
0-7695-1378-6
Type
conf
DOI
10.1109/ATS.2001.990270
Filename
990270
Link To Document