• DocumentCode
    2344325
  • Title

    High density, aspect ratio through-wafer electrical interconnect vias for low cost, generic modular MEMS packaging

  • Author

    Ok, Seong Joon ; Baldwin, Daniel

  • Author_Institution
    George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    8
  • Lastpage
    11
  • Abstract
    The commercialization of Micro-Electro-Mechanical-Systems (MEMS) devices is hindered mainly due to association of high cost and inadequate solution of packaging. This paper outlines the current microsystem packaging challenges, and guides potential solutions for these problems. Low cost, generic and modular microsystem packaging designs are introduced, and the focus is on fabrication of high-density, aspect ratio through-wafer vias for electrical interconnect. In modern microsystem packaging, high input and output (I/O) is one of the key functional requirements, and this vertical electrical interconnection is intended for improved space efficiency. High aspect ratio through-wafer vias are dry etched followed by silicon dioxide insulation layer
  • Keywords
    interconnections; micromechanical devices; packaging; sputter etching; SiO2; dry etching; electrical interconnect; generic modular MEMS packaging; high-density high-aspect-ratio through-wafer via; silicon dioxide insulation layer; Accelerometers; Chemical technology; Commercialization; Costs; Fabrication; Integrated circuit interconnections; Integrated circuit packaging; Microelectromechanical devices; Micromechanical devices; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Packaging Materials, 2002. Proceedings. 2002 8th International Symposium on
  • Conference_Location
    Stone Mountain, GA
  • Print_ISBN
    0-7803-7434-7
  • Type

    conf

  • DOI
    10.1109/ISAPM.2002.990358
  • Filename
    990358