DocumentCode
2345363
Title
New decoder for triple-error-correcting binary BCH codes
Author
Zhi-yuan, Xie ; Na, Li ; Le-le, Li
Author_Institution
Dept. of Electron. & Commun. Eng., North China Electr. Power Univ., Baoding
fYear
2008
fDate
3-5 June 2008
Firstpage
1426
Lastpage
1429
Abstract
A step-by-step decoding algorithm is introduced for triple-error correcting binary BCH codes of length n = 2m -1. The error bit can be directly determined by this algorithm, and the computation is simple and regular. Based on the analysis of the decoding algorithm, the hardware decoder is improved in continuous decoding condition. Furthermore, a new method for the key point of this algorithm, the look-up table of (x1 ´)5 + (x2 ´)5, is presented to simplify the difficult hardware decoder.
Keywords
BCH codes; binary codes; decoding; error correction codes; decoding algorithm; hardware decoder; triple-error-correcting binary BCH codes; Algorithm design and analysis; Data communication; Decoding; Error correction; Error correction codes; Hardware; Polynomials; Power engineering and energy; Power engineering computing; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics and Applications, 2008. ICIEA 2008. 3rd IEEE Conference on
Conference_Location
Singapore
Print_ISBN
978-1-4244-1717-9
Electronic_ISBN
978-1-4244-1718-6
Type
conf
DOI
10.1109/ICIEA.2008.4582754
Filename
4582754
Link To Document