DocumentCode
2346716
Title
Soft error immunity of 1-Volt CMOS memory cells with MTCMOS technology
Author
Douseki, Takakuni ; Mutoh, Shinichiro ; Ueki, Takemi ; Yamada, Junzo
Author_Institution
NTT LSI Labs., Atsugi, Japan
fYear
1995
fDate
22-25 Mar 1995
Firstpage
107
Lastpage
111
Abstract
Soft error immunity of a 1-V operating CMOS memory cell is described. A test chip using multi threshold CMOS (MTCMOS) technology is fabricated and the immunity of the memory cell is evaluated. It is demonstrated that a full CMOS memory cell has high immunity at 1-V operation
Keywords
CMOS memory circuits; alpha-particle effects; integrated circuit testing; α-radiation effects; 1 V; CMOS memory cells; MTCMOS technology; multi threshold CMOS; soft error immunity; test chip; Batteries; CMOS technology; Circuit noise; Laboratories; Large scale integration; Leakage current; Logic gates; Low voltage; MOSFETs; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location
Nara
Print_ISBN
0-7803-2065-4
Type
conf
DOI
10.1109/ICMTS.1995.513955
Filename
513955
Link To Document