• DocumentCode
    2346806
  • Title

    PAM-Blox: high performance FPGA design for adaptive computing

  • Author

    Mencer, Oskar ; Morf, Martin ; Flynn, Michael J.

  • Author_Institution
    Comput. Syst. Lab., Stanford Univ., CA, USA
  • fYear
    1998
  • fDate
    15-17 Apr 1998
  • Firstpage
    167
  • Lastpage
    174
  • Abstract
    PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High-performance FPGA design for adaptive computing is simplified by using a hierarchy of optimized hardware objects described in C++. PAM-Blox consist of two major layers of abstraction. First, PamBlox are parameterizable simple elements such as counters and adders. Automatic placement of carry chains and flexible shapes are supported. PaModules are more complex elements possibly instantiating PamBlox. PaModules have fixed shapes and are usually optimized for a specific data-width. Examples for PaModules are multipliers, Coordinate Rotations (CORDICs), and special arithmetic units for encryption. The key difference of our approach to most other design tools for FPGAs is that the designer has total control over placement at each level of the design hierarchy, which is the key to high-performance FPGA design. Second, the object interface was chosen carefully to encourage code-reuse and simplify code-sharing between designers. PAM-Blox are intended to be part of an open library that allows design sharing between members of the adaptive computing community
  • Keywords
    adders; cryptography; digital arithmetic; field programmable gate arrays; logic design; C++; CORDICs; PAM-Blox; PCI Pamette design environment; PaModules; PamDC; adaptive computing; adders; automatic placement; carry chains; counters; encryption; flexible shapes; high performance FPGA design; multipliers; object interface; object-oriented circuit generators; open library; optimized hardware objects; Adders; Arithmetic; Counting circuits; Cryptography; Design optimization; Field programmable gate arrays; Hardware; High performance computing; Libraries; Shape;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-8186-8900-5
  • Type

    conf

  • DOI
    10.1109/FPGA.1998.707894
  • Filename
    707894