An ultra-low-power, radiation-tolerant Reed Solomon encoder for space applications

Author

Gambles, J. ; Miles, L. ; Hass, J. ; Smith, W. ; Whitaker, S. ; Smith, B.

Author_Institution

Center for Adv. Microelectron. & Biomolecular Res., Univ. of Idaho, Post Falls, ID, USA

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

631

Lastpage

634

Abstract

Power is a limiting constraint in spacecraft design. This paper describes a Reed Solomon encoder designed for NASA using a triple metal, 0.35 μm, ultra-low-power (500mV) CMOS process. Comparisons with a 3.3 V version show a 29.6 to 1 reduction in power to 14.3 mW at 60 MHz. Hardness against space radiation effects was achieved through circuit and layout techniques.

Keywords

CMOS integrated circuits; Reed-Solomon codes; encoding; integrated circuit layout; low-power electronics; radiation hardening (electronics); space communication links; space vehicle electronics; 0.35 micron; 14.3 mW; 3.3 V; 500 mV; 60 MHz; NASA; circuit techniques; layout techniques; power constraint; power reduction; space applications; space radiation effects hardness; spacecraft design; triple metal ultra-low-power CMOS process; ultra-low-power radiation-tolerant Reed Solomon encoder; CMOS process; Circuits; Clocks; Delay; Energy consumption; NASA; Polynomials; Reed-Solomon codes; Space vehicles; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249475

Filename

1249475