Switching noise reduction techniques for switched-capacitor voltage doubler

Author

Lee, Hoi ; Mok, Philip K T

Author_Institution

Hong Kong Univ. of Sci. & Technol., Clear Water Bay, China

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

693

Lastpage

696

Abstract

Switching noise reduction techniques for integrated switched-capacitor cross-coupled voltage doublers, which use a break-before-make mechanism and have an increase of resistance of the serial power transistors during turn-on, are presented in this paper. Implemented in a 0.6-μm CMOS process, experimental results show that the switching noise of the voltage doubler is reduced by at least 3 times. The quiescent power dissipation of the proposed doubler is reduced by 2 times at 2.5-V supply voltage and 500-kHz switching frequency compared to the conventional counterpart.

Keywords

CMOS integrated circuits; DC-DC power convertors; integrated circuit noise; switched capacitor networks; switching convertors; voltage multipliers; 0.6 micron; 2.5 V; 500 kHz; CMOS; break-before-make switching mechanism; cross-coupled voltage doublers; power transistor resistance increase; quiescent power dissipation; switched-capacitor voltage doubler; switching frequency; switching noise reduction techniques; Capacitors; Circuit noise; MOSFETs; Noise generators; Noise reduction; Power generation; Power transistors; Switching converters; Switching frequency; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249488

Filename

1249488