DocumentCode
2348351
Title
MUX-MCM based quantization VLSI architecture for H.264/AVC high profile encoder
Author
Ying, Jiang ; Chen, Xinhua ; Fan, Yibo ; Zeng, Xiaoyang
Author_Institution
Coll. of Inf. Sci. & Eng., Shandong Univ. of Sci. & Technol., Qingdao, China
fYear
2011
fDate
3-5 Oct. 2011
Firstpage
72
Lastpage
77
Abstract
This paper presents a hardware-efficient and high-throughput quantization implementation for H.264/AVC high profiles encoder. The constant multiplication in quantization is accomplished by time-multiplexed multiple-constant multipliers (MUX-MCM). By rational pipeline decision, the proposed design manages to achieve a high throughput at a low area cost. Synthesized with SMIC0.18μm technology, the proposed design reaches a maximum operating frequency of 250Mhz with a throughput of 1Gpixels/sec at the hardware cost of 28.56 Kgates.
Keywords
VLSI; video coding; H.264/AVC high profile encoder; MUX-MCM based quantization VLSI architecture; hardware-efficient high-throughput quantization implementation; time-multiplexed multiple-constant multipliers; Arrays; Field programmable gate arrays; Table lookup; H.264/AVC encoder; MUX-MXM; multipl constant multiplier; quantization;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on
Conference_Location
Hong Kong
Print_ISBN
978-1-4577-0171-9
Electronic_ISBN
978-1-4577-0169-6
Type
conf
DOI
10.1109/VLSISoC.2011.6081632
Filename
6081632
Link To Document