• DocumentCode
    234985
  • Title

    First demonstration of a surface mountable, ultra-thin glass BGA package for smart mobile logic devices

  • Author

    Sundaram, Venky ; Sato, Yuuki ; Seki, Takaya ; Takagi, Yutaka ; Smet, Vanessa ; Kobayashi, Masato ; Tummala, Rao

  • Author_Institution
    3D Syst. Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2014
  • fDate
    27-30 May 2014
  • Firstpage
    365
  • Lastpage
    370
  • Abstract
    This paper presents the first demonstration of an ultra-thin glass BGA package that is assembled on to mother board with standard SMT technology. Such a package has many new advances that include ultra-thin glass, high speed through via hole formation and copper metallization, double-side RDL wiring with advanced 3 micron ground rules, and Cu-SnAg microbump assembly of a 10mm silicon test die. Glass, as a package, overcomes the shortcomings of organic packages in bump pitch, CTE mismatch to Si and warpage and silicon interposers in electrical performance and cost. Glass packages are being developed to manufacture both as wafers for improved performance over Si and as panels to improve bump pitch over organic packages. Glass, therefore, is not just a high performance and low volume technology, like silicon interposers, but a pervasive package technology with lower cost, higher performance and thinner than silicon and organic packages. Glass has compelling benefits in thickness and I/O pitch reduction and reliability for one of the highest volume applications, namely, the packaging of high I/O logic devices for smart mobile systems. This paper represents a paradigm shift in ultra-thin packages using large glass panels for future smart mobile and high performance devices, and the first demonstration of 100um thin glass packages with 50-80um c hip-level I/O pitch and 18 mm × 18mm body size surface mount assembly at 400um pitch.
  • Keywords
    ball grid arrays; glass; logic circuits; microassembling; surface mount technology; CTE mismatch; Cu-SnAg; I-O logic devices; SMT technology; bump pitch; copper metallization; double-side RDL wiring; high speed through via hole formation; large glass panels; microbump assembly; mother board; organic packages; silicon interposers; silicon test die; size 10 mm; size 400 mum; size 50 mum to 80 mum; smart mobile systems; thin glass packages; ultra-thin glass BGA package; Assembly; Glass; Mobile communication; Packaging; Polymers; Silicon; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th
  • Conference_Location
    Orlando, FL
  • Type

    conf

  • DOI
    10.1109/ECTC.2014.6897313
  • Filename
    6897313